Difference between revisions of "StrichLux/IO-SPI"

From Hackstrich
(Connector research.)
(Status update.)
Line 1: Line 1:
The StrichLux IO-SPI module will provide one universe of SPI output for the [[StrichLux]] system, mainly for use driving addressable LED strips.  Initially it will only support output, but it may support input later on if there is a need for it.
+
The StrichLux IO-SPI module will provide one universe of SPI output for the [[StrichLux]] system, mainly for use driving addressable LED strips.  Initially it will only support output, but the hardware supports output, so it could be implemented later.
  
 
== Project Status ==
 
== Project Status ==
 +
* 2012-04-29: Finished schematic, done board layout, checklists run, sent to Laen for manufacturing.  Parts still need to be ordered.
 +
* 2012-04-28: Started schematicizing and BOM selection.
 
* 2012-04-24: Started initial planning.
 
* 2012-04-24: Started initial planning.
  
 
== Specs ==
 
== Specs ==
 
* Based around the Lattice MachXO2-256 CPLD (common to other IO modules)
 
* Based around the Lattice MachXO2-256 CPLD (common to other IO modules)
* Will pass power through from one of the high power busses or accept direct external power input
+
* Will pass power through from one of the high power busses
 
** Needs to handle 50W! (4.25A @ 12V or 10A @ 5V)
 
** Needs to handle 50W! (4.25A @ 12V or 10A @ 5V)
 
* JST SM seems to be a common connector for these
 
* JST SM seems to be a common connector for these
 
** But it's wire-to-wire only, no PCB mount version available
 
** But it's wire-to-wire only, no PCB mount version available
** Screw terminals may be the best option
+
** Using a 2x3 Mini-Fit Jr. connector instead, 6 pins so it can carry a full SPI bus (MISO/MOSI/!SS/SCLK) plus power
  
 
== Architecture ==
 
== Architecture ==

Revision as of 19:29, 29 April 2012

The StrichLux IO-SPI module will provide one universe of SPI output for the StrichLux system, mainly for use driving addressable LED strips. Initially it will only support output, but the hardware supports output, so it could be implemented later.

Project Status

  • 2012-04-29: Finished schematic, done board layout, checklists run, sent to Laen for manufacturing. Parts still need to be ordered.
  • 2012-04-28: Started schematicizing and BOM selection.
  • 2012-04-24: Started initial planning.

Specs

  • Based around the Lattice MachXO2-256 CPLD (common to other IO modules)
  • Will pass power through from one of the high power busses
    • Needs to handle 50W! (4.25A @ 12V or 10A @ 5V)
  • JST SM seems to be a common connector for these
    • But it's wire-to-wire only, no PCB mount version available
    • Using a 2x3 Mini-Fit Jr. connector instead, 6 pins so it can carry a full SPI bus (MISO/MOSI/!SS/SCLK) plus power

Architecture

<graph>graph {output: svg;}[ SPI Hardened Core ] <-- Wishbone --> [ Module Controller Softcore ]</graph>