Difference between revisions of "StrichLux/IO-ETH"

From Hackstrich
(LED display issue.)
(There's a common-cathode display version, so can use that until the board gets redone (it's a bit more expensive))
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== Project Status ==
 
== Project Status ==
 +
* 2012-06-23: Another evening of testing, found issue (worked around) with the display, fixed many software issues, but still no Ethernet link yet.  Suspect (after I left the lab) that a missing SYSTEMConfigPerformance() call may be the culprit.
 
* 2012-06-21: PCBs and parts are here, assembled the first board.  No time to test, will have to do that tomorrow.  Firmware is ~10% complete.
 
* 2012-06-21: PCBs and parts are here, assembled the first board.  No time to test, will have to do that tomorrow.  Firmware is ~10% complete.
 
* 2012-05-27: Routing done, checklist run, CAM processing done, sent off to MyRO for PCB manufacturing.  Still need to order parts.
 
* 2012-05-27: Routing done, checklist run, CAM processing done, sent off to MyRO for PCB manufacturing.  Still need to order parts.
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* Ethernet termination resistors are shown as 75 on the schematic, but (correctly) 49.9 on BOM
 
* Ethernet termination resistors are shown as 75 on the schematic, but (correctly) 49.9 on BOM
 
* C5 is under the crystal!
 
* C5 is under the crystal!
* LED display common wired to GND, but it's a common anode unit
+
* LED display common wired to GND, but it's a common anode unit (can switch from ACSA to ACSC model until the board gets redone)
  
 
[[Category:Current Projects]]
 
[[Category:Current Projects]]
 
[[Category:Status/Waiting for Time]]
 
[[Category:Status/Waiting for Time]]

Revision as of 13:49, 23 June 2012

The StrichLux IO-ETH module will provide 1-4 universes of input or output via Art-Net initially, but may support other protocols later. This module can "take over" adjacent channels if configured to, so that only one module is needed for a complete StrichLux system.

Project Status

  • 2012-06-23: Another evening of testing, found issue (worked around) with the display, fixed many software issues, but still no Ethernet link yet. Suspect (after I left the lab) that a missing SYSTEMConfigPerformance() call may be the culprit.
  • 2012-06-21: PCBs and parts are here, assembled the first board. No time to test, will have to do that tomorrow. Firmware is ~10% complete.
  • 2012-05-27: Routing done, checklist run, CAM processing done, sent off to MyRO for PCB manufacturing. Still need to order parts.
  • 2012-05-26: Schematic/BOM complete, routing starting.
  • 2012-05-25: Started schematic.
  • 2012-05-01: Renamed from IO-ArtNet to IO-ETH, as I may support ACN or other protocols later.
  • 2012-04-24: Started initial planning.

Specs

  • Based around the PIC32MX664F128H microcontroller as there is no economical way to do Ethernet on FPGAs for low-cost designs
  • This micro has no EEPROM (?!) so will need external I2C EEPROM for storing config data
    • Using one with a MAC address burns in solves the problem of needing an IAB too
  • Also needs external PHY
    • LAN8720C is supported, small, and inexpensive, so it seems a good choice

Rev. 1 Issues

  • Ethernet termination resistors are shown as 75 on the schematic, but (correctly) 49.9 on BOM
  • C5 is under the crystal!
  • LED display common wired to GND, but it's a common anode unit (can switch from ACSA to ACSC model until the board gets redone)