StrichLux/CORE

The StrichLux Core is the "motherboard" of the system, that holds the framebuffers and lets the I/O modules talk to each other. It also holds the "transform engine", which is the FPGA that can do various transforms between the input and output.

Project Log

• 2012-05-04: Started putting together specs/BOM.

Project Ideas

• Required I/O
  • 4 Input modules (one SPI slave transceiver and one I2C master transceiver each)
  • 4 output modules (one SPI slave transceiver and one I2C master transceiver each)
  • RS232 and USB for troubleshooting and configuring the core board itself
  • 1 Power module (one I2C master transceiver)
• Local framebuffer memory
  • Dual-port memory would be best so the output and input sections can both deal with it independently
  • 8 bits per frame * 512 channels per universe * 4 universes = 16kbit (2kbyte) of framebuffer memory required
    • Twice that for double-buffering would be awesome, so 32kbit/4kbyte of dual-port memory wanted
  • Split into 4 channels, so each block would be 8kbit/1kbyte
  • Reading/writing needs to happen in parallel for each block
• Looking at using the LFXP2-8E-5TN144C FPGA
  • 5 series is ~$5 cheaper but only has 3 sysDSP blocks, given the 4 channel system, 4 blocks seems a better fit