Difference between revisions of "ECLair"
From Hackstrich
(Categorizing.) |
(I like an 8-bit data width better, I think.) |
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| Line 7: | Line 7: | ||
* MECL-based | * MECL-based | ||
* 25MHz main clock | * 25MHz main clock | ||
| − | * | + | * 8-bit data width |
* 24-bit physical address, 16-bit virtual address | * 24-bit physical address, 16-bit virtual address | ||
* DMA support (at least for front panel, maybe one other DMA channel?) | * DMA support (at least for front panel, maybe one other DMA channel?) | ||
Revision as of 16:19, 25 November 2012
ECLair is a long-term project to build an ECL minicomputer.
Project Status
- 2012-11-24: Basic ideas/architecture starting to get put together.
Architecture Overview
- MECL-based
- 25MHz main clock
- 8-bit data width
- 24-bit physical address, 16-bit virtual address
- DMA support (at least for front panel, maybe one other DMA channel?)
- Microcoded, running control store in SRAM for speed
- Unless I can find equally-fast EPROMs
- Copied to SRAM from EPROM before the system starts
