Difference between revisions of "Project Peacock"

From Hackstrich
Line 1: Line 1:
 
Project Peacock will be (in theory) a chipset for doing DVI/VGA display output from a microcontroller.  It will consist of:
 
Project Peacock will be (in theory) a chipset for doing DVI/VGA display output from a microcontroller.  It will consist of:
 +
* Display Controller MCU
 +
** Communicate with host via I2C/SPI/RS232
 
* Display Driver CPLD
 
* Display Driver CPLD
* Display Controller MCU
+
** Essentially just the digital part of a RAMDAC, constantly reads data from the RAM and spits it out to the output converter
 +
** Using a CPLD means the Display Controller MCU doesn't need to be super-fast
 
* RAM
 
* RAM
 
** SRAM
 
** SRAM

Revision as of 13:50, 10 September 2010

Project Peacock will be (in theory) a chipset for doing DVI/VGA display output from a microcontroller. It will consist of:

  • Display Controller MCU
    • Communicate with host via I2C/SPI/RS232
  • Display Driver CPLD
    • Essentially just the digital part of a RAMDAC, constantly reads data from the RAM and spits it out to the output converter
    • Using a CPLD means the Display Controller MCU doesn't need to be super-fast
  • RAM
    • SRAM
      • Far too expensive (~$200) for the amount needed
    • PSRAM (Pseudo SRAM)/CellularRAM
      • SRAM interface but DRAM backend, simple to interface with and cheap (~$6)
      • Only available in VFBGA package meaning a four-layer board would be required, and hard to solder
    • SDRAM
      • Inexpensive (~$5) and readily available
      • Easy non-BGA SMT packages
      • Harder to interface with, would need to have the CPLD handle RAM refreshing and other housekeeping
  • Output converter
    • TMDS converter for DVI
    • DAC for VGA