Difference between revisions of "Project Peacock"
From Hackstrich
(New page: Project Peacock will be (in theory) a chipset for doing DVI/VGA display output from a microcontroller. It will consist of: * Display Driver CPLD * Display Controller MCU * RAM * Output co...) |
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* Display Controller MCU | * Display Controller MCU | ||
* RAM | * RAM | ||
| + | ** SRAM | ||
| + | *** Far too expensive (~$200) for the amount needed | ||
| + | ** PSRAM (Pseudo SRAM)/CellularRAM | ||
| + | *** SRAM interface but DRAM backend, simple to interface with and cheap (~$6) | ||
| + | *** Only available in VFBGA package meaning a four-layer board would be required, and hard to solder | ||
| + | ** '''SDRAM''' | ||
| + | *** Inexpensive (~$5) and readily available | ||
| + | *** Easy non-BGA SMT packages | ||
| + | *** Harder to interface with, would need to have the CPLD handle RAM refreshing and other housekeeping | ||
* Output converter | * Output converter | ||
** TMDS converter for DVI | ** TMDS converter for DVI | ||
Revision as of 12:43, 10 September 2010
Project Peacock will be (in theory) a chipset for doing DVI/VGA display output from a microcontroller. It will consist of:
- Display Driver CPLD
- Display Controller MCU
- RAM
- SRAM
- Far too expensive (~$200) for the amount needed
- PSRAM (Pseudo SRAM)/CellularRAM
- SRAM interface but DRAM backend, simple to interface with and cheap (~$6)
- Only available in VFBGA package meaning a four-layer board would be required, and hard to solder
- SDRAM
- Inexpensive (~$5) and readily available
- Easy non-BGA SMT packages
- Harder to interface with, would need to have the CPLD handle RAM refreshing and other housekeeping
- SRAM
- Output converter
- TMDS converter for DVI
- DAC for VGA
